Welcome to Codasip
At Codasip, we believe we are the most innovative processor solutions company. We take pride in designing and developing cutting-edge, high-performance, and energy-efficient CPU cores from scratch, using our own proprietary tools to fully customize them. We empower our customers' system-on-chip developers to create the most innovative products, providing them with a unique competitive edge.
Our processor cores are based on the RISC-V open architecture. The Codasip Custom Compute approach along with our unique architecture description language, CodAL, and our automated processor design tool, Codasip Studio, unleash the potential for customizing RISC-V. These are integral to our groundbreaking RISC-V processor solutions.
Established in 2014, we’ve grown into a dynamic and talented global community. Our IP engineering teams reside across Europe, including our primary and largest design center in the beautiful city of Brno, Czechia. Across Europe, our design teams operate from Cambridge, Bristol, Munich, Villeneuve-Loubet, Barcelona, Thessaloniki, Heraklion, and Athens. We also have dedicated sales and application engineers in the USA, Japan, Korea, and China to be closer to our customers.
As a private entity funded by substantial EU grants, our products have already made a significant impact, with billions of devices on the market powered by our processor IP and tools.
Department: Labs
Employment: Full-time
Experience level: Mid-Senior (Ph.D. or MSc)
Location: Germany (preferably in Munich). Our office in Munich is situated near the city center with good public transport connections – Munich Central Station is not far off. Remote work is possible within Germany.
WHY WE ARE HIRING:
We are seeking an experienced AI/ML HW Engineer to join our innovation team at Codasip Labs. By joining us, you will be working on the Neurokit2e project, which is part of the EU Horizon Europe framework. The goal of the Neurokit2e project is to design a RISC-V-based Application Specific Accelerator for Neuromorphic Computing.
YOUR MAIN RESPONSIBILITIES:
- Develop innovative micro-architectural IP cores using Codasip Studio for the next generation of Neuromorphic accelerators based on the RISC-V architecture.
- Customize existing Codasip RISC-V IP cores to meet partner/customer needs.
- Collaborate with internal and external stakeholders.
Requirements
- Over 5 years of pertinent recent experience.
- A strong background in Digital Design, computer architecture, and embedded systems.
- Experience with AI/ML, deployment and optimization of Spiking Neural Networks (SNNs) is an advantage.
- Experience with CPU or accelerator IP design is an advantage
- Experience with VHDL/Verilog, and FPGA/ASIC deployment.
- Proficiency in C/ C++/ Assembly, HLS, and scripting languages (bash, Python).
- Fluent in spoken and written English. Knowledge of German is an advantage.
- Excellent problem-solving skills with a knack for out-of-the-box thinking.
- Excellent communication skills, pragmatism, proactive attitude, and team spirit.
Benefits
Join Codasip to be an Architect of Ambition
At Codasip, we value creativity and collaboration. "Codasippers" are encouraged to explore their ideas and experiment with new techniques. We cultivate an environment that encourages cross-departmental collaboration and knowledge sharing. This diversity in work assignments provides you with an opportunity to add value to your role.
Joining Codasip means becoming part of a team of self-starters where every idea is appreciated, and your voice matters. We aim to create an environment where ambition can thrive, and career horizons can expand. So, join our team of Architects of Ambition. We are excited to see what you will accomplish at Codasip.
SOME USEFUL LINKS ON CODASIP:
- [Codasip RISC V Processor Solutions](https://youtu.be/_sXyYFhCzPM)
- [Design for differentiation: architecture licenses in RISC‑V](https://codasip.com/2022/05/16/design-for-differentiation-architecture-license-riscv/)
- [Scaling is Failing - Dr. Ron Black, CEO, Codasip](https://youtu.be/AEQKrWbcoFk)
- [Codasip Labs to accelerate advanced technologies](https://codasip.com/press-release/2022/12/07/codasip-launches-codasip-labs-to-accelerate-advanced-technologies/)
- [Introducing fine-grained memory protection with the first commercial implementation of CHERI](https://codasip.com/press-release/2023/10/31/codasip-delivers-processor-security-to-actively-prevent-cyberattacks/)