AI/ML HW Innovation Engineers (CZ)

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$45 K - $85 K

Full Time

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Welcome to Codasip We believe Codasip is the most innovative processor solutions company. We take pride in designing and developing cutting-edge, high-performance, and energy-efficient CPU cores from scratch, and our own automated proprietary tools to fully customize them. We give our customers a unique competitive advantage by empowering their system-on-chip developers to build the most innovative products. Our processor cores are based on the RISC-V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach: our unique architecture description language, CodAL, and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions. Founded in 2014, we've grown into a thriving and talented global community. Our IP engineering teams work from offices spread across Europe, including our first and largest design center in the beautiful city of Brno, Czechia. Across Europe, we already have design teams in Cambridge, Bristol, Munich, Villeneuve-Loubet, Barcelona, Thessaloniki, Heraklion and Athens. The Codasip team is also based close to its customers, which means we have dedicated sales and application engineers in the USA, Japan, Korea, and China. Codasip is a private company backed by well-funded EU grants. Our products are already making a real impact, with billions of devices already in the market powered by our processor IP and tools.

Department: Labs
Employment: Full-time
Experience level: Mid-Senior (Ph.D./ MSc)
Location: CZ (preferably in Brno or Prague)
Remote work within Czech Republic.

YOUR MAIN RESPONSIBILITIES:

We are looking for an experienced AI/ML HW Engineer to join our innovation team at Codasip Labs. The candidate will work on the ISOLDE project which is part of the EU Horizon Europe framework. The ISOLDE project is focused on HW components for the next-generation high-performance, low-power, and secure RISC-V cores and accelerators.
- - Innovate, develop, integrate, and evaluate state-of-the-art (micro-)architectural IP cores in Codasip Studio (primarily written in Codasip Studio’s processor description language, CodAL) for the next generation of Neuromorphic accelerators based on the RISC-V architecture.
  - Customize existing Codasip RISC-V IP cores to satisfy partners'/ customers' requirements.
  - Collaborate with internal and external stakeholders.

Requirements

Over 5 years of recent and relevant experience.
Strong background in Digital Design, computer architecture, and embedded systems.
Experience with motor control or AI/ML inference application advantage
Experience with CPU or accelerator IP design advantage
Experience with VHDL/Verilog, and FPGA/ASIC deployment.
SW skills: C/ C++/ Assembly, HLS, and scripting languages (bash, Python).
Fluent written and spoken English is essential.
Strong analytical and problem-solving skills, thinking outside of the box.
Excellent communication skills, pragmatic, proactive, self-motivated, team player

Benefits Want to be an architect of ambition? Join Codasip At Codasip we are committed to fostering a creative and collaborative work environment. Codasippers have the freedom to explore original ideas and experiment with new techniques. We believe in the benefits of cross-departmental collaboration and encourage sharing to build awareness throughout the teams. This enables you to add value through variety in your work. When you join Codasip, you become part of a motivated team of self-starters where your ideas are appreciated and your voice is heard. We strive to create an environment where your ambition can flourish and your career can reach new heights. So, come and join our team of architects of ambition. We can't wait to see what you'll achieve at Codasip. SOME USEFUL LINKS ON CODASIP:

Codasip RISC V Processor Solutions
Design for differentiation: architecture licenses in RISC-V
Scaling is Failing - Dr. Ron Black, CEO, Codasip
Codasip Labs to accelerate advanced technologies
Czechs integrate technology to improve processor security for the first time in the world