Join HII as a Junior Hardware Engineer - Requisition Number: 19461

Required Travel: 0 - 10%
Employment Type: Full Time/Salaried/Exempt
Security Clearance: Ability to Obtain
Level of Experience: Entry Level

About the Role

This opportunity resides within the Cyber & Electronic Warfare business group, part of HII’s Mission Technologies division. At HII, we collaborate with our nation’s intelligence and cyber operations communities to safeguard our interests in cyberspace. Our in-depth expertise in network architecture, software and hardware development, cybersecurity, and the electromagnetic environment empowers us to support sensitive missions for federal agency partners.

Meet HII’s Mission Technologies Division

Our team of over 7,000 professionals worldwide provides all-domain expertise and advanced technologies to mission partners globally. Mission Technologies is a leader in the next evolution of national defense - the data evolution - by fast-tracking a range of national security solutions for government and commercial customers. Our capabilities span from C5ISR, AI and Big Data, cyber operations, and synthetic training environments to fleet sustainment, environmental remediation, and the largest family of unmanned underwater vehicles in every class.

Find the role that's right for you. . Apply today. We look forward to meeting you!

Job Description

Are you passionate about tackling challenging digital design verification problems? HII Mission Technologies is seeking innovative thinkers to identify complex bugs and vulnerabilities in FPGA and ASIC designs' gate-level netlists. Utilize industry-standard functional verification tools (e.g., Questa, VCS, Verdi), logical equivalence tools (e.g., OneSpin 360EC), and proprietary software tools to ensure design function and integrity.

Common verification targets include embedded processors, DSPs, filters, transceivers, data links, systems-on-chip, and decoders. Experience in cybersecurity, electronic warfare, encryption, radar, and satellite communications domains is a plus.

Key Responsibilities

Candidates will:

• Develop models, transactors, stimuli, monitors, and test benches for simulating and uncovering hidden behaviors in gate-level digital netlists.
• Produce clear documentation and test cases demonstrating identified bugs or deviations from the specification.
• Collaborate effectively with teammates to produce cohesive results and improved processes.

U.S. citizenship is required, along with the willingness and ability to obtain a DoD security clearance.

Minimum Qualifications

• 0 years of experience with a Bachelor’s in a related field, or a High School Diploma/equivalent and 4 years of relevant experience.
• U.S. Citizenship.
• Willingness to obtain a Top-Secret security clearance.
• Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• Experience with modern digital verification and modeling languages: SystemVerilog, SystemC, C/C++, Matlab, etc.
• Knowledge of directed, constrained-random, and assertion-based verification techniques at the gate, interface, and transaction levels.
• Experience with modern, commercial-grade, functional simulators (e.g., Xcelium, Incisive, Questa, VCS, Riviera-Pro, etc).
• Ability to write scripts for batched verification tasks: Python, Bash, Tcl, make files.
• Experience with revision control systems: Perforce, git, SVN, etc.
• Familiarity with debugging and isolating issues with gate-level netlists.

Preferred Qualifications

• Familiarity with object-oriented, embedded, assembly, or machine code programming.
• Experience in software or hardware reverse-engineering (e.g., IDA Pro, Ghidra).
• FPGA design or verification experience.
• Active Top Secret security clearance.
• Familiarity with testing and verification techniques for IC trust, assurance, or security.
• Experience with logical equivalence checkers (e.g., OneSpin 360-EC, ESP, Conformal EC).
• Experience with formal ABV.

Why Join